vendor: yosys is a required tool for all Verilog-based flows.

This commit is contained in:
whitequark 2019-10-10 14:38:09 +00:00
parent 730eff5d57
commit a7cc88f3d4
4 changed files with 7 additions and 1 deletions

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@ -165,6 +165,7 @@ class LatticeECP5Platform(TemplatedPlatform):
# Diamond templates
_diamond_required_tools = [
"yosys",
"pnmainc",
"ddtcmd"
]

View file

@ -170,6 +170,7 @@ class LatticeICE40Platform(TemplatedPlatform):
# iCECube2 templates
_icecube2_required_tools = [
"yosys",
"synthesis",
"synpwrap",
"tclsh",

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@ -51,7 +51,10 @@ class Xilinx7SeriesPlatform(TemplatedPlatform):
package = abstractproperty()
speed = abstractproperty()
required_tools = ["vivado"]
required_tools = [
"yosys",
"vivado"
]
file_templates = {
**TemplatedPlatform.build_script_templates,

View file

@ -59,6 +59,7 @@ class XilinxSpartan3Or6Platform(TemplatedPlatform):
speed = abstractproperty()
required_tools = [
"yosys",
"xst",
"ngdbuild",
"map",