hdl,back: add support for name= in property checks (Assert, ...).

Co-authored-by: Jean THOMAS <virgule@jeanthomas.me>
2023-02-12 12:21:31 +01:00 · 2023-02-12 12:21:31 +01:00 · a7fec279aa
commit a7fec279aa
parent 666ee27fd0
3 changed files with 11 additions and 5 deletions
--- a/amaranth/back/rtlil.py
+++ b/amaranth/back/rtlil.py
@ -751,7 +751,7 @@ class _StatementCompiler(xfrm.StatementVisitor):
        self.state.rtlil.cell("$" + stmt._kind, ports={
            "\\A": check_wire,
            "\\EN": en_wire,
-        }, src=_src(stmt.src_loc))
+        }, src=_src(stmt.src_loc), name=stmt.name)

    on_Assert = on_property
    on_Assume = on_property