parent
06c734992f
commit
abbebf8efe
2 changed files with 29 additions and 10 deletions
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@ -135,8 +135,8 @@ class RecordTestCase(FHDLTestCase):
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("stb", 1),
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])
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self.assertEqual(repr(r[0]), "(slice (rec r data stb) 0:1)")
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self.assertEqual(repr(r[0:3]), "(slice (rec r data stb) 0:3)")
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self.assertEqual(repr(r[0]), "(slice (cat (sig r__data) (sig r__stb)) 0:1)")
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self.assertEqual(repr(r[0:3]), "(slice (cat (sig r__data) (sig r__stb)) 0:3)")
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def test_wrong_field(self):
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r = Record([
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