hdl.dsl: warn on suspicious statements like m.If(~True):.
This pattern usually produces an extremely hard to notice bug that will usually break a design when it is triggered, but will also be hidden unless the pathological value of a boolean switch is used. Fixes #159.
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@ -268,6 +268,26 @@ class DSLTestCase(FHDLTestCase):
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)
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""")
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def test_If_signed_suspicious(self):
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m = Module()
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with self.assertWarns(SyntaxWarning,
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msg="Signed values in If/Elif conditions usually result from inverting Python "
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"booleans with ~, which leads to unexpected results: ~True is -2, which is "
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"truthful. (Silence this warning with `m.If(x)` → `m.If(x.bool())`.)"):
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with m.If(~True):
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pass
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def test_Elif_signed_suspicious(self):
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m = Module()
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with m.If(0):
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pass
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with self.assertWarns(SyntaxWarning,
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msg="Signed values in If/Elif conditions usually result from inverting Python "
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"booleans with ~, which leads to unexpected results: ~True is -2, which is "
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"truthful. (Silence this warning with `m.If(x)` → `m.If(x.bool())`.)"):
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with m.Elif(~True):
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pass
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def test_Switch(self):
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m = Module()
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with m.Switch(self.w1):
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