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vendor.xilinx_spartan_3_6: explain why ASYNC_REG is used. NFC.

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whitequark 2019-09-24 12:22:29 +00:00
parent d14366450b
commit b43d2d36e8
1 changed files with 5 additions and 0 deletions
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5
nmigen/vendor/xilinx_spartan_3_6.py vendored
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@ -411,6 +411,11 @@ class XilinxSpartan3Or6Platform(TemplatedPlatform):
) )
return m return m
# The synchronizer implementations below apply the ASYNC_REG attribute. This attribute
# prevents inference of shift registers from synchronizer FFs, and constraints the FFs
# to be placed as close as possible, ideally in one CLB. This attribute only affects
# the synchronizer FFs themselves.
def get_ff_sync(self, ff_sync): def get_ff_sync(self, ff_sync):
if ff_sync._max_input_delay is not None: if ff_sync._max_input_delay is not None:
raise NotImplementedError("Platform {!r} does not support constraining input delay " raise NotImplementedError("Platform {!r} does not support constraining input delay "