hdl.ast: give Assert and Assume their own src_loc.

This helps with patterns like `Assert(fsm.ongoing("IDLE"))`, which
would otherwise point into nMigen internals.
This commit is contained in:
whitequark 2019-01-19 00:08:51 +00:00
parent 66466a8a0e
commit b50b47d984
3 changed files with 23 additions and 34 deletions

View file

@ -617,7 +617,7 @@ class _StatementCompiler(xfrm.StatementVisitor):
self.state.rtlil.cell("$assert", ports={
"\\A": check_wire,
"\\EN": en_wire,
}, src=src(stmt.test.src_loc))
}, src=src(stmt.src_loc))
def on_Assume(self, stmt):
self(stmt._check.eq(stmt.test))
@ -628,7 +628,7 @@ class _StatementCompiler(xfrm.StatementVisitor):
self.state.rtlil.cell("$assume", ports={
"\\A": check_wire,
"\\EN": en_wire,
}, src=src(stmt.test.src_loc))
}, src=src(stmt.src_loc))
def on_Switch(self, stmt):
self._check_rhs(stmt.test)