Move star imports to make from nmigen import * usable.
This commit is contained in:
parent
ad3c88852f
commit
b5a1efa0c8
9 changed files with 14 additions and 13 deletions
|
|
@ -1,4 +1,4 @@
|
|||
from nmigen.fhdl import *
|
||||
from nmigen import *
|
||||
from nmigen.back import rtlil, verilog
|
||||
|
||||
|
||||
|
|
|
|||
|
|
@ -1,4 +1,4 @@
|
|||
from nmigen.fhdl import *
|
||||
from nmigen import *
|
||||
from nmigen.back import rtlil, verilog
|
||||
|
||||
|
||||
|
|
|
|||
|
|
@ -1,4 +1,4 @@
|
|||
from nmigen.fhdl import *
|
||||
from nmigen import *
|
||||
from nmigen.back import rtlil, verilog
|
||||
|
||||
|
||||
|
|
|
|||
|
|
@ -1,6 +1,5 @@
|
|||
from nmigen.fhdl import *
|
||||
from nmigen import *
|
||||
from nmigen.back import rtlil, verilog
|
||||
from nmigen.genlib.cdc import *
|
||||
|
||||
|
||||
i, o = Signal(name="i"), Signal(name="o")
|
||||
|
|
|
|||
|
|
@ -1,4 +1,4 @@
|
|||
from nmigen.fhdl import *
|
||||
from nmigen import *
|
||||
from nmigen.back import rtlil, verilog, pysim
|
||||
|
||||
|
||||
|
|
|
|||
|
|
@ -1,4 +1,4 @@
|
|||
from nmigen.fhdl import *
|
||||
from nmigen import *
|
||||
from nmigen.back import rtlil, verilog, pysim
|
||||
|
||||
|
||||
|
|
|
|||
|
|
@ -1,4 +1,4 @@
|
|||
from nmigen.fhdl import *
|
||||
from nmigen import *
|
||||
from nmigen.back import rtlil, verilog
|
||||
|
||||
|
||||
|
|
|
|||
Loading…
Add table
Add a link
Reference in a new issue