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backends: s/ilang/rtlil as a result of https://github.com/YosysHQ/yosys/pull/4704

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Sebastian Holzapfel 2024-11-15 10:18:31 +01:00 committed by tmbv
parent de685ca026
commit bf4f22d2d5
7 changed files with 18 additions and 18 deletions
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4
amaranth/back/cxxrtl.py
View file

@ -23,8 +23,8 @@ def _convert_rtlil_text(rtlil_text, black_boxes, *, src_loc_at=0):
script = []
if black_boxes is not None:
for box_name, box_source in black_boxes.items():
script.append(f"read_ilang <<rtlil\n{box_source}\nrtlil")
script.append(f"read_ilang <<rtlil\n{rtlil_text}\nrtlil")
script.append(f"read_rtlil <<rtlil\n{box_source}\nrtlil")
script.append(f"read_rtlil <<rtlil\n{rtlil_text}\nrtlil")
script.append("write_cxxrtl")
return yosys.run(["-q", "-"], "\n".join(script), src_loc_at=1 + src_loc_at)

2
amaranth/back/verilog.py
View file

@ -12,7 +12,7 @@ def _convert_rtlil_text(rtlil_text, *, strip_internal_attrs=False, write_verilog
yosys = find_yosys(lambda ver: ver >= (0, 40))
script = []
script.append(f"read_ilang <<rtlil\n{rtlil_text}\nrtlil")
script.append(f"read_rtlil <<rtlil\n{rtlil_text}\nrtlil")
script.append("proc -nomux -norom")
script.append("memory_collect")

6
amaranth/vendor/_altera.py
View file

@ -222,7 +222,7 @@ class AlteraPlatform(TemplatedPlatform):
* ``verbose``: enables logging of informational messages to standard error.
* ``read_verilog_opts``: adds options for ``read_verilog`` Yosys command.
* ``synth_opts``: adds options for ``synth_intel_alm`` Yosys command.
* ``script_after_read``: inserts commands after ``read_ilang`` in Yosys script.
* ``script_after_read``: inserts commands after ``read_rtlil`` in Yosys script.
* ``script_after_synth``: inserts commands after ``synth_intel_alm`` in Yosys script.
* ``yosys_opts``: adds extra options for ``yosys``.
* ``nextpnr_opts``: adds extra options for ``nextpnr-mistral``.
@ -374,9 +374,9 @@ class AlteraPlatform(TemplatedPlatform):
read_verilog -sv {{get_override("read_verilog_opts")|options}} {{file}}
{% endfor %}
{% for file in platform.iter_files(".il") -%}
read_ilang {{file}}
read_rtlil {{file}}
{% endfor %}
read_ilang {{name}}.il
read_rtlil {{name}}.il
{{get_override("script_after_read")|default("# (script_after_read placeholder)")}}
synth_intel_alm {{get_override("synth_opts")|options}} -top {{name}}
{{get_override("script_after_synth")|default("# (script_after_synth placeholder)")}}

4
amaranth/vendor/_gowin.py
View file

@ -376,9 +376,9 @@ class GowinPlatform(TemplatedPlatform):
read_verilog -sv {{get_override("read_verilog_opts")|options}} {{file}}
{% endfor %}
{% for file in platform.iter_files(".il") -%}
read_ilang {{file}}
read_rtlil {{file}}
{% endfor %}
read_ilang {{name}}.il
read_rtlil {{name}}.il
{{get_override("script_after_read")|default("# (script_after_read placeholder)")}}
synth_gowin {{get_override("synth_opts")|options}} -top {{name}} -json {{name}}.syn.json
{{get_override("script_after_synth")|default("# (script_after_synth placeholder)")}}

12
amaranth/vendor/_lattice.py
View file

@ -319,7 +319,7 @@ class LatticePlatform(TemplatedPlatform):
* ``verbose``: enables logging of informational messages to standard error.
* ``read_verilog_opts``: adds options for ``read_verilog`` Yosys command.
* ``synth_opts``: adds options for ``synth_<family>`` Yosys command.
* ``script_after_read``: inserts commands after ``read_ilang`` in Yosys script.
* ``script_after_read``: inserts commands after ``read_rtlil`` in Yosys script.
* ``script_after_synth``: inserts commands after ``synth_<family>`` in Yosys script.
* ``yosys_opts``: adds extra options for ``yosys``.
* ``nextpnr_opts``: adds extra options for ``nextpnr-<family>``.
@ -348,7 +348,7 @@ class LatticePlatform(TemplatedPlatform):
* ``verbose``: enables logging of informational messages to standard error.
* ``read_verilog_opts``: adds options for ``read_verilog`` Yosys command.
* ``synth_opts``: adds options for ``synth_nexus`` Yosys command.
* ``script_after_read``: inserts commands after ``read_ilang`` in Yosys script.
* ``script_after_read``: inserts commands after ``read_rtlil`` in Yosys script.
* ``script_after_synth``: inserts commands after ``synth_nexus`` in Yosys script.
* ``yosys_opts``: adds extra options for ``yosys``.
* ``nextpnr_opts``: adds extra options for ``nextpnr-nexus``.
@ -474,9 +474,9 @@ class LatticePlatform(TemplatedPlatform):
read_verilog -sv {{get_override("read_verilog_opts")|options}} {{file}}
{% endfor %}
{% for file in platform.iter_files(".il") -%}
read_ilang {{file}}
read_rtlil {{file}}
{% endfor %}
read_ilang {{name}}.il
read_rtlil {{name}}.il
{{get_override("script_after_read")|default("# (script_after_read placeholder)")}}
{% if platform.family == "ecp5" %}
synth_ecp5 {{get_override("synth_opts")|options}} -top {{name}}
@ -567,9 +567,9 @@ class LatticePlatform(TemplatedPlatform):
read_verilog -sv {{get_override("read_verilog_opts")|options}} {{file}}
{% endfor %}
{% for file in platform.iter_files(".il") -%}
read_ilang {{file}}
read_rtlil {{file}}
{% endfor %}
read_ilang {{name}}.il
read_rtlil {{name}}.il
delete w:$verilog_initial_trigger
{{get_override("script_after_read")|default("# (script_after_read placeholder)")}}
synth_nexus {{get_override("synth_opts")|options}} -top {{name}}

6
amaranth/vendor/_siliconblue.py
View file

@ -26,7 +26,7 @@ class SiliconBluePlatform(TemplatedPlatform):
* ``verbose``: enables logging of informational messages to standard error.
* ``read_verilog_opts``: adds options for ``read_verilog`` Yosys command.
* ``synth_opts``: adds options for ``synth_ice40`` Yosys command.
* ``script_after_read``: inserts commands after ``read_ilang`` in Yosys script.
* ``script_after_read``: inserts commands after ``read_rtlil`` in Yosys script.
* ``script_after_synth``: inserts commands after ``synth_ice40`` in Yosys script.
* ``yosys_opts``: adds extra options for ``yosys``.
* ``nextpnr_opts``: adds extra options for ``nextpnr-ice40``.
@ -121,9 +121,9 @@ class SiliconBluePlatform(TemplatedPlatform):
read_verilog -sv {{get_override("read_verilog_opts")|options}} {{file}}
{% endfor %}
{% for file in platform.iter_files(".il") -%}
read_ilang {{file}}
read_rtlil {{file}}
{% endfor %}
read_ilang {{name}}.il
read_rtlil {{name}}.il
{{get_override("script_after_read")|default("# (script_after_read placeholder)")}}
synth_ice40 {{get_override("synth_opts")|options}} -top {{name}}
{{get_override("script_after_synth")|default("# (script_after_synth placeholder)")}}

2
tests/utils.py
View file

@ -62,7 +62,7 @@ class FHDLTestCase(unittest.TestCase):
smtbmc
[script]
read_ilang top.il
read_rtlil top.il
prep
{script}