build.plat: allow removing src
attributes from RTLIL output.
This is important for Glasgow, which uses RTLIL hash as cache key, and expects it to be stable between CI jobs.
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@ -303,7 +303,7 @@ class TemplatedPlatform(Platform):
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continue
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yield net_signal, port_signal, frequency
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def toolchain_prepare(self, fragment, name, **kwargs):
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def toolchain_prepare(self, fragment, name, *, emit_src=True, **kwargs):
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# Restrict the name of the design to a strict alphanumeric character set. Platforms will
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# interpolate the name of the design in many different contexts: filesystem paths, Python
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# scripts, Tcl scripts, ad-hoc constraint files, and so on. It is not practical to add
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@ -319,7 +319,7 @@ class TemplatedPlatform(Platform):
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# and to incorporate the Amaranth version into generated code.
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autogenerated = "Automatically generated by Amaranth {}. Do not edit.".format(__version__)
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rtlil_text, self._name_map = rtlil.convert_fragment(fragment, name=name)
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rtlil_text, self._name_map = rtlil.convert_fragment(fragment, name=name, emit_src=emit_src)
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# Retrieve an override specified in either the environment or as a kwarg.
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# expected_type parameter is used to assert the type of kwargs, passing `None` will disable
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