parent
385b10d743
commit
d1ca9c46a5
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@ -238,7 +238,7 @@ class Layout(ShapeCastable, metaclass=ABCMeta):
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"it casts to, {!r}, and not {!r}"
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"it casts to, {!r}, and not {!r}"
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.format(field.shape, cast_field_shape,
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.format(field.shape, cast_field_shape,
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key_value.shape()))
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key_value.shape()))
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else:
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elif not isinstance(key_value, Const):
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key_value = Const(key_value, cast_field_shape)
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key_value = Const(key_value, cast_field_shape)
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int_value &= ~(((1 << cast_field_shape.width) - 1) << field.offset)
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int_value &= ~(((1 << cast_field_shape.width) - 1) << field.offset)
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int_value |= key_value.value << field.offset
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int_value |= key_value.value << field.offset
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@ -424,6 +424,10 @@ class LayoutTestCase(FHDLTestCase):
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r"that it casts to, unsigned\(8\), and not unsigned\(1\)$"):
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r"that it casts to, unsigned\(8\), and not unsigned\(1\)$"):
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sl.const({"f": "01"})
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sl.const({"f": "01"})
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def test_const_field_const(self):
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sl = StructLayout({"f": unsigned(1)})
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self.assertRepr(sl.const({"f": Const(1)}), "(const 1'd1)")
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def test_signal_reset(self):
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def test_signal_reset(self):
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sl = StructLayout({
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sl = StructLayout({
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"a": unsigned(1),
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"a": unsigned(1),
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