back.rtlil: use one $meminit cell, not one per word.
This is *far* more efficient.
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@ -644,21 +644,23 @@ def convert_fragment(builder, fragment, name, top):
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memories[memory] = module.memory(width=memory.width, size=memory.depth,
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name=memory.name)
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addr_bits = bits_for(memory.depth)
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data_parts = ["{}'".format(memory.width * memory.depth)]
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for addr in range(memory.depth):
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if addr < len(memory.init):
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data = memory.init[addr]
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else:
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data = 0
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module.cell("$meminit", ports={
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"\\ADDR": rhs_compiler(ast.Const(addr, addr_bits)),
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"\\DATA": rhs_compiler(ast.Const(data, memory.width)),
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}, params={
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"MEMID": memories[memory],
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"ABITS": addr_bits,
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"WIDTH": memory.width,
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"WORDS": 1,
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"PRIORITY": 0,
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})
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data_parts.append("{:0{}b}".format(data, memory.width))
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module.cell("$meminit", ports={
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"\\ADDR": rhs_compiler(ast.Const(0, addr_bits)),
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"\\DATA": "".join(data_parts),
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}, params={
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"MEMID": memories[memory],
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"ABITS": addr_bits,
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"WIDTH": memory.width,
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"WORDS": memory.depth,
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"PRIORITY": 0,
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})
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param_value = memories[memory]
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