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hdl.ast: simplify Mux implementation.

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This commit is contained in:
whitequark 2021-10-02 14:18:02 +00:00
parent 65499d5c45
commit e88d283ed3
4 changed files with 9 additions and 4 deletions
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2
nmigen/back/rtlil.py
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@ -562,6 +562,8 @@ class _RHSValueCompiler(_ValueCompiler):
def on_Operator_mux(self, value):
sel, val1, val0 = value.operands
if len(sel) != 1:
sel = sel.bool()
val1_bits, val1_sign = val1.shape()
val0_bits, val0_sign = val0.shape()
res_bits, res_sign = value.shape()

3
nmigen/hdl/ast.py
View file

@ -735,9 +735,6 @@ def Mux(sel, val1, val0):
Value, out
Output ``Value``. If ``sel`` is asserted, the Mux returns ``val1``, else ``val0``.
"""
sel = Value.cast(sel)
if len(sel) != 1:
sel = sel.bool()
return Operator("m", [sel, val1, val0])

2
tests/test_hdl_ast.py
View file

@ -542,7 +542,7 @@ class OperatorTestCase(FHDLTestCase):
def test_mux_wide(self):
s = Const(0b100)
v = Mux(s, Const(0, unsigned(4)), Const(0, unsigned(6)))
self.assertEqual(repr(v), "(m (b (const 3'd4)) (const 4'd0) (const 6'd0))")
self.assertEqual(repr(v), "(m (const 3'd4) (const 4'd0) (const 6'd0))")
def test_mux_bool(self):
v = Mux(True, Const(0), Const(0))

6
tests/test_sim.py
View file

@ -191,6 +191,12 @@ class SimulatorUnitTestCase(FHDLTestCase):
self.assertStatement(stmt, [C(2, 4), C(3, 4), C(0)], C(2, 4))
self.assertStatement(stmt, [C(2, 4), C(3, 4), C(1)], C(3, 4))
def test_mux_wide(self):
stmt = lambda y, a, b, c: y.eq(Mux(c, a, b))
self.assertStatement(stmt, [C(2, 4), C(3, 4), C(0, 2)], C(3, 4))
self.assertStatement(stmt, [C(2, 4), C(3, 4), C(1, 2)], C(2, 4))
self.assertStatement(stmt, [C(2, 4), C(3, 4), C(2, 2)], C(2, 4))
def test_abs(self):
stmt = lambda y, a: y.eq(abs(a))
self.assertStatement(stmt, [C(3, unsigned(8))], C(3, unsigned(8)))