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hdl._nir: Remove ArrayMux, use AssignmentList instead.

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Wanda 2024-03-03 19:46:15 +01:00 • committed by Catherine
parent fc9369b8e1
commit ea561378ac
4 changed files with 61 additions and 68 deletions
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56
tests/test_hdl_ir.py
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@ -2901,10 +2901,10 @@ class RhsTestCase(FHDLTestCase):
(input 'i8sb' 0.34:42)
(input 'i8sc' 0.42:50)
(input 'i4' 0.50:54)
(output 'o1' (cat 1.0:8 2'd0))
(output 'o2' (cat 2.0:9 2.8))
(output 'o3' (cat 3.0:8 3.7 3.7))
(output 'o4' (cat 4.0:8 4.7 4.7))
(output 'o1' (cat 5.0:8 2'd0))
(output 'o2' (cat 10.0:9 10.8))
(output 'o3' (cat 15.0:8 15.7 15.7))
(output 'o4' (cat 20.0:8 20.7 20.7))
)
(cell 0 0 (top
(input 'i8ua' 2:10)
@ -2914,15 +2914,47 @@ class RhsTestCase(FHDLTestCase):
(input 'i8sb' 34:42)
(input 'i8sc' 42:50)
(input 'i4' 50:54)
(output 'o1' (cat 1.0:8 2'd0))
(output 'o2' (cat 2.0:9 2.8))
(output 'o3' (cat 3.0:8 3.7 3.7))
(output 'o4' (cat 4.0:8 4.7 4.7))
(output 'o1' (cat 5.0:8 2'd0))
(output 'o2' (cat 10.0:9 10.8))
(output 'o3' (cat 15.0:8 15.7 15.7))
(output 'o4' (cat 20.0:8 20.7 20.7))
))
(cell 1 0 (matches 0.50:54 0000))
(cell 2 0 (matches 0.50:54 0001))
(cell 3 0 (matches 0.50:54 0010))
(cell 4 0 (priority_match 1 (cat 1.0 2.0 3.0)))
(cell 5 0 (assignment_list 0.2:10
(4.0 0:8 0.2:10)
(4.1 0:8 0.10:18)
(4.2 0:8 0.18:26)
))
(cell 6 0 (matches 0.50:54 0000))
(cell 7 0 (matches 0.50:54 0001))
(cell 8 0 (matches 0.50:54 0010))
(cell 9 0 (priority_match 1 (cat 6.0 7.0 8.0)))
(cell 10 0 (assignment_list (cat 0.2:10 1'd0)
(9.0 0:9 (cat 0.2:10 1'd0))
(9.1 0:9 (cat 0.10:18 1'd0))
(9.2 0:9 (cat 0.42:50 0.49))
))
(cell 11 0 (matches 0.50:54 0000))
(cell 12 0 (matches 0.50:54 0001))
(cell 13 0 (matches 0.50:54 0010))
(cell 14 0 (priority_match 1 (cat 11.0 12.0 13.0)))
(cell 15 0 (assignment_list 0.26:34
(14.0 0:8 0.26:34)
(14.1 0:8 0.34:42)
(14.2 0:8 0.42:50)
))
(cell 16 0 (matches 0.50:54 0000))
(cell 17 0 (matches 0.50:54 0001))
(cell 18 0 (matches 0.50:54 0010))
(cell 19 0 (priority_match 1 (cat 16.0 17.0 18.0)))
(cell 20 0 (assignment_list 0.26:34
(19.0 0:8 0.26:34)
(19.1 0:8 0.34:42)
(19.2 0:8 (cat 0.50:54 4'd0))
))
(cell 1 0 (array_mux 8 0.50:54 (0.2:10 0.10:18 0.18:26)))
(cell 2 0 (array_mux 9 0.50:54 ((cat 0.2:10 1'd0) (cat 0.10:18 1'd0) (cat 0.42:50 0.49))))
(cell 3 0 (array_mux 8 0.50:54 (0.26:34 0.34:42 0.42:50)))
(cell 4 0 (array_mux 8 0.50:54 (0.26:34 0.34:42 (cat 0.50:54 4'd0))))
)
""")