whitequark
909a3b8be7
Rename nMigen to Amaranth HDL.
2021-12-10 10:34:13 +00:00
whitequark
c9879c795b
build.{dsl,res,plat}: apply clock constraints to signals, not resources.
...
This adds the Clock() build DSL element, and adds a resource manager
function add_clock_constraint() that takes a Pin or a Signal.
Note that not all platforms, in particular not any nextpnr platforms
at the moment, can add constraints on arbitrary signals.
Fixes #86 .
2019-06-05 08:52:30 +00:00
whitequark
ab3f103e5a
build.dsl: replace extras= with Attrs().
...
This change proved more tricky than expected due to downstream
dependencies, so it also includes some secondary refactoring.
2019-06-05 07:02:08 +00:00
whitequark
4310254103
build.res: use ConstraintError iff a constraint invariant is violated.
...
In particular don't use it for type errors.
2019-06-04 11:00:11 +00:00
whitequark
a013eb1f59
build.dsl: add support for connectors.
2019-06-03 13:47:00 +00:00
whitequark
b1eab9fb3b
build.plat: implement.
2019-06-01 16:43:27 +00:00
Jean-François Nguyen
dd5bd1c88d
build: add DSL for defining platform resources.
2019-04-24 11:49:01 +00:00
