whitequark 011bf2258e hdl: make ClockSignal and ResetSignal usable on LHS. ... Fixes #8.		2019-01-14 15:38:16 +00:00
..
alu.py	cli: new module, for basic design generaton/simulation.	2018-12-23 00:06:58 +00:00
alu_hier.py	cli: new module, for basic design generaton/simulation.	2018-12-23 00:06:58 +00:00
arst.py	cli: new module, for basic design generaton/simulation.	2018-12-23 00:06:58 +00:00
cdc.py	cli: new module, for basic design generaton/simulation.	2018-12-23 00:06:58 +00:00
ctr.py	cli: new module, for basic design generaton/simulation.	2018-12-23 00:06:58 +00:00
ctr_ce.py	examples: rename clkdiv/ctrl to ctr/ctr_ce.	2018-12-15 20:42:52 +00:00
fsm.py	hdl.dsl: add support for fsm.ongoing().	2018-12-27 16:19:01 +00:00
gpio.py	hdl.rec: add basic record support.	2018-12-28 13:22:10 +00:00
inst.py	cli: new module, for basic design generaton/simulation.	2018-12-23 00:06:58 +00:00
mem.py	cli: new module, for basic design generaton/simulation.	2018-12-23 00:06:58 +00:00
pmux.py	cli: new module, for basic design generaton/simulation.	2018-12-23 00:06:58 +00:00
por.py	hdl: make ClockSignal and ResetSignal usable on LHS.	2019-01-14 15:38:16 +00:00