57 lines
2.1 KiB
Python
57 lines
2.1 KiB
Python
from ...build import *
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from ..fpga.lattice_ice40 import LatticeICE40Platform, IceStormProgrammerMixin
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__all__ = ["ICEStickPlatform"]
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class ICEStickPlatform(IceStormProgrammerMixin, LatticeICE40Platform):
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device = "hx1k"
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package = "tq144"
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clocks = [
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("clk12", 12e6),
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]
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resources = [
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Resource("clk12", 0, Pins("21", dir="i"),
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extras={"GLOBAL": "1", "IO_STANDARD": "SB_LVCMOS33"}),
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Resource("user_led", 0, Pins("99", dir="o"), extras={"IO_STANDARD": "SB_LVCMOS33"}),
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Resource("user_led", 1, Pins("98", dir="o"), extras={"IO_STANDARD": "SB_LVCMOS33"}),
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Resource("user_led", 2, Pins("97", dir="o"), extras={"IO_STANDARD": "SB_LVCMOS33"}),
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Resource("user_led", 3, Pins("96", dir="o"), extras={"IO_STANDARD": "SB_LVCMOS33"}),
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Resource("user_led", 4, Pins("95", dir="o"), extras={"IO_STANDARD": "SB_LVCMOS33"}),
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Resource("serial", 0,
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Subsignal("rx", Pins("9", dir="i")),
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Subsignal("tx", Pins("8", dir="o")),
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Subsignal("rts", Pins("7", dir="o")),
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Subsignal("cts", Pins("4", dir="i")),
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Subsignal("dtr", Pins("3", dir="o")),
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Subsignal("dsr", Pins("2", dir="i")),
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Subsignal("dcd", Pins("1", dir="i")),
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extras={"IO_STANDARD": "SB_LVTTL", "PULLUP": "1"}
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),
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Resource("irda", 0,
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Subsignal("rx", Pins("106", dir="i")),
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Subsignal("tx", Pins("105", dir="o")),
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Subsignal("sd", Pins("107", dir="o")),
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extras={"IO_STANDARD": "SB_LVCMOS33"}
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),
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Resource("spiflash", 0,
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Subsignal("cs_n", Pins("71", dir="o")),
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Subsignal("clk", Pins("70", dir="o")),
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Subsignal("mosi", Pins("67", dir="o")),
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Subsignal("miso", Pins("68", dir="i")),
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extras={"IO_STANDARD": "SB_LVCMOS33"}
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),
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]
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connectors = [
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Connector("pmod", 0, "78 79 80 81 - - 87 88 90 91 - -"), # J2
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Connector("j", 1, "- - 112 113 114 115 116 117 118 119"), # J1
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Connector("j", 3, "- - 62 61 60 56 48 47 45 44"), # J3
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]
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prog_mode = "flash"
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