Jin Xue 3a51b61284 sim._pyrtl: translate ArrayProxy to pattern matching when supported. ... Current the value compiler translates ArrayProxy into if-elif trees which can cause the compiler to crash due to deep recursion (#359). After this commit, it instead translates them into pattern matching when it is supported (on Python >= 3.10) to avoid this problem.		2022-09-24 10:22:47 +00:00
..
__init__.py	Rename nMigen to Amaranth HDL.	2021-12-10 10:34:13 +00:00
_base.py	Rename nMigen to Amaranth HDL.	2021-12-10 10:34:13 +00:00
_pyclock.py	sim: represent time internally as 1ps units	2021-12-13 08:15:11 +00:00
_pycoro.py	sim: represent time internally as 1ps units	2021-12-13 08:15:11 +00:00
_pyrtl.py	sim._pyrtl: translate ArrayProxy to pattern matching when supported.	2022-09-24 10:22:47 +00:00
core.py	sim: Fix clock phase in add_clock having to be specified in ps.	2022-02-04 16:46:52 +00:00
pysim.py	sim.pysim: use "bench" as a top level root for testbench signals.	2021-12-16 15:46:05 +00:00