whitequark 3e2ecdf2fb build.res,vendor: place clock constraint on port, not net, if possible. ... For most toolchains, these are functionally identical, although ports tend to work a bit better, being the common case. For Vivado, though, it is necessary to place them on the port because its timing analyzer considers input buffer delay. Fixes #301.		2020-02-06 23:37:15 +00:00
..
__init__.py	build.{dsl,res,plat}: apply clock constraints to signals, not resources.	2019-06-05 08:52:30 +00:00
dsl.py	build.dsl: allow strings to be used as connector numbers.	2020-01-31 03:11:34 +00:00
plat.py	build.plat: align pipeline with Fragment.prepare().	2020-02-01 03:26:04 +00:00
res.py	build.res,vendor: place clock constraint on port, not net, if possible.	2020-02-06 23:37:15 +00:00
run.py	build.run: fix indentation.	2020-01-07 12:57:49 +00:00