whitequark 7b25665fde back.pysim: fix behavior of initial cycle for sync processes. ... The current behavior was introduced in 65702719, which was a wrong fix for an issue that was actually fixed in 12e04e4e. This commit effectively reverts 65702719 and 1782b841.		2019-01-25 20:37:56 +00:00
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__init__.py	Initial commit.	2018-12-12 03:18:44 +00:00
pysim.py	back.pysim: fix behavior of initial cycle for sync processes.	2019-01-25 20:37:56 +00:00
rtlil.py	hdl.ast: give Assert and Assume their own src_loc.	2019-01-19 00:08:51 +00:00
verilog.py	back.verilog: better error message if Yosys is not found.	2019-01-13 08:10:23 +00:00