whitequark 6fd7cbad0d hdl.dsl: don't allow inheriting from Module. ... `Module` is an object with a lot of complex and sometimes fragile behavior that overrides Python attribute accessors and so on. To prevent user designs from breaking when it is changed, it is not supposed to be inherited from (unlike in Migen), but rather returned from the elaborate() method. This commit makes sure it will not be inherited from by accident (most likely by users familiar with Migen). Fixes #286.		2020-02-01 02:15:45 +00:00
..
__init__.py	Remove everything deprecated in nmigen 0.1.	2020-01-12 13:59:26 +00:00
ast.py	hdl.ast: warn on unused property statements (Assert, Assume, etc).	2020-02-01 02:03:23 +00:00
cd.py	hdl.cd: add negedge clock domains.	2019-08-31 22:05:48 +00:00
dsl.py	hdl.dsl: don't allow inheriting from Module.	2020-02-01 02:15:45 +00:00
ir.py	hdl.ast: warn on unused property statements (Assert, Assume, etc).	2020-02-01 02:03:23 +00:00
mem.py	hdl.mem: fix src_loc_at in ReadPort, WritePort.	2019-12-15 11:46:26 +00:00
rec.py	Remove everything deprecated in nmigen 0.1.	2020-01-12 13:59:26 +00:00
xfrm.py	hdl.ast: warn on unused property statements (Assert, Assume, etc).	2020-02-01 02:03:23 +00:00