whitequark 955f3f6dcc back.verilog: use proc -nomux if it is available. ... Yosys offers no stability guarantees for individual `proc_*` passes, though so far it worked out fine. This commit changes the Verilog backend to use `proc -nomux` instead, which is guaranteed to have backwards-compatible behavior. Fixes #479.		2020-08-27 13:03:15 +00:00
..
__init__.py	Initial commit.	2018-12-12 03:18:44 +00:00
cxxrtl.py	back.cxxrtl: actualize Yosys version requirement.	2020-08-26 09:16:46 +00:00
pysim.py	sim: split into base, core, and engines.	2020-08-27 11:52:31 +00:00
rtlil.py	back.rtlil: do not squash empty modules.	2020-08-26 22:45:19 +00:00
verilog.py	back.verilog: use proc -nomux if it is available.	2020-08-27 13:03:15 +00:00