amaranth/nmigen/back
2018-12-13 11:30:16 +00:00
..
__init__.py Initial commit. 2018-12-12 03:18:44 +00:00
rtlil.py back.rtlil: never give subfragment cells names starting with $. 2018-12-13 11:30:16 +00:00
verilog.py back.verilog: detect undriven public wires using Yosys. 2018-12-13 04:59:48 +00:00