amaranth/nmigen/back
whitequark 8947096eea back.pysim: accept write_vcd(vcd_file=None).
Because write_vcd() is a context manager, this is useful if the VCD
file should be sometimes not written, since it avoids awkward
conditionals with duplicated code. It's not very elegant though.

Fixes #319.
2020-02-12 14:42:06 +00:00
..
__init__.py Initial commit. 2018-12-12 03:18:44 +00:00
pysim.py back.pysim: accept write_vcd(vcd_file=None). 2020-02-12 14:42:06 +00:00
rtlil.py hdl.ast: add Value.{as_signed,as_unsigned}. 2020-02-06 18:27:55 +00:00
verilog.py back.verilog: remove $verilog_initial_trigger after proc_prune. 2019-10-28 10:11:41 +00:00