amaranth/nmigen/back
whitequark b50b47d984 hdl.ast: give Assert and Assume their own src_loc.
This helps with patterns like `Assert(fsm.ongoing("IDLE"))`, which
would otherwise point into nMigen internals.
2019-01-19 00:08:51 +00:00
..
__init__.py Initial commit. 2018-12-12 03:18:44 +00:00
pysim.py hdl.xfrm: add SampleLowerer. 2019-01-17 01:41:02 +00:00
rtlil.py hdl.ast: give Assert and Assume their own src_loc. 2019-01-19 00:08:51 +00:00
verilog.py back.verilog: better error message if Yosys is not found. 2019-01-13 08:10:23 +00:00