a2241fcfdb
Because Fragment.prepare is not (currently) idempotent, it is useful to be able to avoid calling it when converting. Even if it is made idempotent, it can be slow on large designs, so it is advantageous regardless of that.
61 lines
1.6 KiB
Python
61 lines
1.6 KiB
Python
import os
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import subprocess
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from . import rtlil
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__all__ = ["YosysError", "convert", "convert_fragment"]
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class YosysError(Exception):
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pass
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def _convert_il_text(il_text, strip_src):
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try:
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popen = subprocess.Popen([os.getenv("YOSYS", "yosys"), "-q", "-"],
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stdin=subprocess.PIPE,
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stdout=subprocess.PIPE,
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stderr=subprocess.PIPE,
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encoding="utf-8")
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except FileNotFoundError as e:
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if os.getenv("YOSYS"):
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raise YosysError("Could not find Yosys in {} as specified via the YOSYS environment "
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"variable".format(os.getenv("YOSYS"))) from e
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else:
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raise YosysError("Could not find Yosys in PATH. Place `yosys` in PATH or specify "
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"path explicitly via the YOSYS environment variable") from e
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attr_map = []
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if strip_src:
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attr_map.append("-remove src")
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verilog_text, error = popen.communicate("""
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# Convert nMigen's RTLIL to readable Verilog.
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read_ilang <<rtlil
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{}
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rtlil
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proc_prune
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proc_init
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proc_arst
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proc_dff
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proc_clean
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memory_collect
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attrmap {}
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write_verilog -norename
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""".format(il_text, " ".join(attr_map)))
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if popen.returncode:
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raise YosysError(error.strip())
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else:
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return verilog_text
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def convert_fragment(*args, strip_src=False, **kwargs):
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il_text = rtlil.convert_fragment(*args, **kwargs)
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return _convert_il_text(il_text, strip_src)
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def convert(*args, strip_src=False, **kwargs):
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il_text = rtlil.convert(*args, **kwargs)
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return _convert_il_text(il_text, strip_src)
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