6fae06aea9
Although a dir="oe" pin is generally equivalent to dir="io" pin with the i* signal(s) disconnected, they are not equivalent, because some pins may not be able to support input buffers at all, either because there are no input buffers, or because the input buffers are consumed by some other resource. E.g. this can happen on iCE40 when the input buffer is consumed by a PLL.
324 lines
12 KiB
Python
324 lines
12 KiB
Python
from collections import OrderedDict
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from abc import ABCMeta, abstractmethod, abstractproperty
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import os
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import sys
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import subprocess
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import textwrap
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import re
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import zipfile
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import jinja2
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from .. import __version__
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from ..hdl.ast import *
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from ..hdl.dsl import *
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from ..hdl.ir import *
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from ..back import rtlil, verilog
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from .res import ConstraintManager
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__all__ = ["Platform", "TemplatedPlatform"]
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class BuildPlan:
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def __init__(self, script):
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self.script = script
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self.files = OrderedDict()
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def add_file(self, filename, content):
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assert isinstance(filename, str) and filename not in self.files
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# Just to make sure we don't accidentally overwrite anything.
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assert not os.path.normpath(filename).startswith("..")
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self.files[filename] = content
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def execute(self, root="build", run_script=True):
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os.makedirs(root, exist_ok=True)
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cwd = os.getcwd()
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try:
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os.chdir(root)
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for filename, content in self.files.items():
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dirname = os.path.dirname(filename)
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if dirname:
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os.makedirs(dirname, exist_ok=True)
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mode = "wt" if isinstance(content, str) else "wb"
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with open(filename, mode) as f:
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f.write(content)
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if run_script:
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if sys.platform.startswith("win32"):
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subprocess.run(["cmd", "/c", "{}.bat".format(self.script)], check=True)
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else:
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subprocess.run(["sh", "{}.sh".format(self.script)], check=True)
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return BuildProducts(os.getcwd())
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finally:
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os.chdir(cwd)
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def archive(self, file):
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with zipfile.ZipFile(file, "w") as archive:
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# Write archive members in deterministic order and with deterministic timestamp.
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for filename in sorted(self.files):
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archive.writestr(zipfile.ZipInfo(filename), self.files[filename])
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class BuildProducts:
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def __init__(self, root):
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self._root = root
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def get(self, filename, mode="b"):
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assert mode in "bt"
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with open(os.path.join(self._root, filename), "r" + mode) as f:
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return f.read()
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class Platform(ConstraintManager, metaclass=ABCMeta):
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resources = abstractproperty()
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clocks = abstractproperty()
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def __init__(self):
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super().__init__(self.resources, self.clocks)
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self.extra_files = OrderedDict()
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self._prepared = False
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def add_file(self, filename, content):
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if not isinstance(filename, str):
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raise TypeError("File name must be a string")
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if filename in self.extra_files:
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raise ValueError("File {} already exists"
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.format(filename))
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if hasattr(content, "read"):
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content = content.read()
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elif not isinstance(content, (str, bytes)):
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raise TypeError("File contents must be str, bytes, or a file-like object")
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self.extra_files[filename] = content
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def build(self, fragment, name="top",
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build_dir="build", do_build=True,
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program_opts=None, do_program=False,
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**kwargs):
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plan = self.prepare(fragment, name, **kwargs)
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if not do_build:
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return plan
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products = plan.execute(build_dir)
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if not do_program:
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return products
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self.toolchain_program(products, name, **(program_opts or {}))
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def prepare(self, fragment, name="top", **kwargs):
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assert not self._prepared
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self._prepared = True
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fragment = Fragment.get(fragment, self)
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def add_pin_fragment(pin, pin_fragment):
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pin_fragment = Fragment.get(pin_fragment, self)
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if not isinstance(pin_fragment, Instance):
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pin_fragment.flatten = True
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fragment.add_subfragment(pin_fragment, name="pin_{}".format(pin.name))
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for pin, port, extras in self.iter_single_ended_pins():
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if pin.dir == "i":
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add_pin_fragment(pin, self.get_input(pin, port, extras))
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if pin.dir == "o":
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add_pin_fragment(pin, self.get_output(pin, port, extras))
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if pin.dir == "oe":
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add_pin_fragment(pin, self.get_tristate(pin, port, extras))
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if pin.dir == "io":
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add_pin_fragment(pin, self.get_input_output(pin, port, extras))
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for pin, p_port, n_port, extras in self.iter_differential_pins():
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if pin.dir == "i":
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add_pin_fragment(pin, self.get_diff_input(pin, p_port, n_port))
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if pin.dir == "o":
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add_pin_fragment(pin, self.get_diff_output(pin, p_port, n_port))
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if pin.dir == "oe":
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add_pin_fragment(pin, self.get_diff_tristate(pin, p_port, n_port))
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if pin.dir == "io":
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add_pin_fragment(pin, self.get_diff_input_output(pin, p_port, n_port))
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return self.toolchain_prepare(fragment, name, **kwargs)
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@abstractmethod
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def toolchain_prepare(self, fragment, name, **kwargs):
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"""
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Convert the ``fragment`` and constraints recorded in this :class:`Platform` into
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a :class:`BuildPlan`.
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"""
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raise NotImplementedError # :nocov:
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def toolchain_program(self, products, name, **kwargs):
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"""
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Extract bitstream for fragment ``name`` from ``products`` and download it to a target.
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"""
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raise NotImplementedError("Platform {} does not support programming"
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.format(self.__class__.__name__))
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def _check_feature(self, feature, pin, extras, valid_xdrs, valid_extras):
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if not valid_xdrs:
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raise NotImplementedError("Platform {} does not support {}"
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.format(self.__class__.__name__, feature))
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elif pin.xdr not in valid_xdrs:
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raise NotImplementedError("Platform {} does not support {} for XDR {}"
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.format(self.__class__.__name__, feature, pin.xdr))
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if not valid_extras and extras:
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raise NotImplementedError("Platform {} does not support extras for {}"
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.format(self.__class__.__name__, feature))
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def get_input(self, pin, port, extras):
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self._check_feature("single-ended input", pin, extras,
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valid_xdrs=(0,), valid_extras=None)
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m = Module()
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m.d.comb += pin.i.eq(port)
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return m
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def get_output(self, pin, port, extras):
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self._check_feature("single-ended output", pin, extras,
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valid_xdrs=(0,), valid_extras=None)
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m = Module()
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m.d.comb += port.eq(pin.o)
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return m
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def get_tristate(self, pin, port, extras):
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self._check_feature("single-ended tristate", pin, extras,
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valid_xdrs=(0,), valid_extras=None)
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m = Module()
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m.submodules += Instance("$tribuf",
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p_WIDTH=pin.width,
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i_EN=pin.oe,
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i_A=pin.o,
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o_Y=port,
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)
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return m
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def get_input_output(self, pin, port, extras):
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self._check_feature("single-ended input/output", pin, extras,
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valid_xdrs=(0,), valid_extras=None)
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m = Module()
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m.submodules += Instance("$tribuf",
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p_WIDTH=pin.width,
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i_EN=pin.oe,
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i_A=pin.o,
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o_Y=port,
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)
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m.d.comb += pin.i.eq(port)
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return m
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def get_diff_input(self, pin, p_port, n_port, extras):
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self._check_feature("differential input", pin, extras,
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valid_xdrs=(), valid_extras=None)
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def get_diff_output(self, pin, p_port, n_port, extras):
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self._check_feature("differential output", pin, extras,
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valid_xdrs=(), valid_extras=None)
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def get_diff_tristate(self, pin, p_port, n_port, extras):
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self._check_feature("differential tristate", pin, extras,
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valid_xdrs=(), valid_extras=None)
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def get_diff_input_output(self, pin, p_port, n_port, extras):
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self._check_feature("differential input/output", pin, extras,
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valid_xdrs=(), valid_extras=None)
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class TemplatedPlatform(Platform):
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file_templates = abstractproperty()
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command_templates = abstractproperty()
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build_script_templates = {
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"build_{{name}}.sh": """
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# {{autogenerated}}
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set -e{{verbose("x")}}
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{{emit_commands("sh")}}
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""",
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"build_{{name}}.bat": """
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@rem {{autogenerated}}
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{{emit_commands("bat")}}
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""",
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}
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def toolchain_prepare(self, fragment, name, **kwargs):
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# This notice serves a dual purpose: to explain that the file is autogenerated,
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# and to incorporate
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autogenerated = "Automatically generated by nMigen {}. Do not edit.".format(__version__)
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def emit_design(backend):
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return {"rtlil": rtlil, "verilog": verilog}[backend].convert(
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fragment, name=name, platform=self, ports=list(self.iter_ports()),
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ensure_sync_exists=False)
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def emit_commands(format):
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commands = []
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for index, command_tpl in enumerate(self.command_templates):
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command = render(command_tpl, origin="<command#{}>".format(index + 1))
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command = re.sub(r"\s+", " ", command)
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if format == "sh":
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commands.append(command)
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elif format == "bat":
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commands.append(command + " || exit /b")
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else:
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assert False
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return "\n".join(commands)
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def get_tool(tool):
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tool_env = tool.upper().replace("-", "_")
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return os.environ.get(tool_env, tool)
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def get_override(var):
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var_env = "NMIGEN_{}".format(var)
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if var_env in os.environ:
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return os.environ[var_env]
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elif var in kwargs:
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return kwargs[var]
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else:
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return jinja2.Undefined(name=var)
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def verbose(arg):
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if "NMIGEN_verbose" in os.environ:
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return arg
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else:
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return jinja2.Undefined(name="quiet")
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def quiet(arg):
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if "NMIGEN_verbose" in os.environ:
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return jinja2.Undefined(name="quiet")
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else:
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return arg
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def render(source, origin):
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try:
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source = textwrap.dedent(source).strip()
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compiled = jinja2.Template(source, trim_blocks=True, lstrip_blocks=True)
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except jinja2.TemplateSyntaxError as e:
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e.args = ("{} (at {}:{})".format(e.message, origin, e.lineno),)
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raise
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return compiled.render({
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"name": name,
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"platform": self,
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"emit_design": emit_design,
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"emit_commands": emit_commands,
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"get_tool": get_tool,
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"get_override": get_override,
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"verbose": verbose,
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"quiet": quiet,
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"autogenerated": autogenerated,
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})
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plan = BuildPlan(script="build_{}".format(name))
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for filename_tpl, content_tpl in self.file_templates.items():
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plan.add_file(render(filename_tpl, origin=filename_tpl),
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render(content_tpl, origin=filename_tpl))
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for filename, content in self.extra_files.items():
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plan.add_file(filename, content)
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return plan
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