whitequark 27b47faf16 hdl.ast: add Value.{as_signed,as_unsigned}. ... Before this commit, there was no way to do so besides creating and assigning an intermediate signal, which could not be extracted into a helper function due to Module statefulness. Fixes #292.		2020-02-06 18:27:55 +00:00
..
__init__.py	Remove everything deprecated in nmigen 0.1.	2020-01-12 13:59:26 +00:00
ast.py	hdl.ast: add Value.{as_signed,as_unsigned}.	2020-02-06 18:27:55 +00:00
cd.py	hdl.cd: add negedge clock domains.	2019-08-31 22:05:48 +00:00
dsl.py	hdl.dsl: make referencing undefined FSM states an error.	2020-02-06 17:47:46 +00:00
ir.py	hdl.ir: type check ports.	2020-02-06 17:33:41 +00:00
mem.py	hdl.mem: add synthesis attribute support.	2020-02-06 14:53:16 +00:00
rec.py	Remove everything deprecated in nmigen 0.1.	2020-01-12 13:59:26 +00:00
xfrm.py	hdl.ast: warn on unused property statements (Assert, Assume, etc).	2020-02-01 02:03:23 +00:00