amaranth/nmigen/back
whitequark 12e04e4ee5 back.pysim: wake up processes before ever committing any values.
Otherwise, the contract of the simulator to sync processes is not
always fulfilled.
2019-01-21 16:00:25 +00:00
..
__init__.py Initial commit. 2018-12-12 03:18:44 +00:00
pysim.py back.pysim: wake up processes before ever committing any values. 2019-01-21 16:00:25 +00:00
rtlil.py hdl.ast: give Assert and Assume their own src_loc. 2019-01-19 00:08:51 +00:00
verilog.py back.verilog: better error message if Yosys is not found. 2019-01-13 08:10:23 +00:00