amaranth/nmigen
whitequark f71e0fffbb hdl.ast: fix shape calculation for *.
This was carried over from Migen, and is wrong there too.
Counterexample: 1'sd-1 * 4'sd-4 = 4'sd-4 (but should be 5'sd4).
2019-01-26 00:56:40 +00:00
..
back back.pysim: fix behavior of initial cycle for sync processes. 2019-01-25 20:37:56 +00:00
compat compat.genlib.fifo: adjust _FIFOInterface shim to not require fwft=. 2019-01-22 06:56:46 +00:00
hdl hdl.ast: fix shape calculation for *. 2019-01-26 00:56:40 +00:00
lib back.pysim: fix behavior of initial cycle for sync processes. 2019-01-25 20:37:56 +00:00
test hdl.ast: fix shape calculation for *. 2019-01-26 00:56:40 +00:00
__init__.py formal: extract from toplevel module. 2019-01-17 01:43:07 +00:00
cli.py cli: add missing default for generate 2019-01-17 20:45:07 +00:00
formal.py formal: extract from toplevel module. 2019-01-17 01:43:07 +00:00
tools.py compat: add wrappers for Slice.stop, Cat.l, _ArrayProxy.choices. 2018-12-18 20:03:32 +00:00
tracer.py tracer: factor out get_src_loc(). 2018-12-28 01:31:24 +00:00