whitequark fa1e466a65 hdl.ast: Operator.{op→operator} ... Both "operator" and "operand" were shortened to "op" in different places in code, which caused confusion.		2019-10-11 11:37:26 +00:00
..
__init__.py	Initial commit.	2018-12-12 03:18:44 +00:00
pysim.py	hdl.ast: Operator.{op→operator}	2019-10-11 11:37:26 +00:00
rtlil.py	hdl.ast: Operator.{op→operator}	2019-10-11 11:37:26 +00:00
verilog.py	vendor.intel: add Quartus support.	2019-10-10 00:35:13 +00:00