hdl.xfrm: implement SwitchCleaner, for pruning empty switches.
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3 changed files with 45 additions and 3 deletions
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@ -158,6 +158,33 @@ class DomainLowererTestCase(FHDLTestCase):
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DomainLowerer({"sync": sync})(f)
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class SwitchCleanerTestCase(FHDLTestCase):
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def test_clean(self):
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a = Signal()
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b = Signal()
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c = Signal()
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stmts = [
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Switch(a, {
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1: a.eq(0),
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0: [
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b.eq(1),
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Switch(b, {1: []})
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]
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})
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]
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self.assertRepr(SwitchCleaner()(stmts), """
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(
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(switch (sig a)
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(case 1
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(eq (sig a) (const 1'd0)))
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(case 0
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(eq (sig b) (const 1'd1)))
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)
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)
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""")
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class LHSGroupAnalyzerTestCase(FHDLTestCase):
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def test_no_group_unrelated(self):
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a = Signal()
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