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vendor.xilinx_{7series,ultrascale}: hierachical -> hierarchical

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Signed-off-by: Robin Ole Heinemann <robin.ole.heinemann@gmail.com>
This commit is contained in:
Robin Ole Heinemann 2021-08-16 23:31:57 +02:00 committed by whitequark
parent abb2642256
commit 23a44f3cb6
2 changed files with 2 additions and 2 deletions
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2
nmigen/vendor/xilinx_7series.py
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@ -122,7 +122,7 @@ class Xilinx7SeriesPlatform(TemplatedPlatform):
}
{{get_override("script_after_synth")|default("# (script_after_synth placeholder)")}}
report_timing_summary -file {{name}}_timing_synth.rpt
report_utilization -hierarchical -file {{name}}_utilization_hierachical_synth.rpt
report_utilization -hierarchical -file {{name}}_utilization_hierarchical_synth.rpt
report_utilization -file {{name}}_utilization_synth.rpt
opt_design
place_design

2
nmigen/vendor/xilinx_ultrascale.py
View file

@ -96,7 +96,7 @@ class XilinxUltraScalePlatform(TemplatedPlatform):
}
{{get_override("script_after_synth")|default("# (script_after_synth placeholder)")}}
report_timing_summary -file {{name}}_timing_synth.rpt
report_utilization -hierarchical -file {{name}}_utilization_hierachical_synth.rpt
report_utilization -hierarchical -file {{name}}_utilization_hierarchical_synth.rpt
report_utilization -file {{name}}_utilization_synth.rpt
opt_design
place_design