hdl.dsl: don't allow inheriting from Module.
`Module` is an object with a lot of complex and sometimes fragile behavior that overrides Python attribute accessors and so on. To prevent user designs from breaking when it is changed, it is not supposed to be inherited from (unlike in Migen), but rather returned from the elaborate() method. This commit makes sure it will not be inherited from by accident (most likely by users familiar with Migen). Fixes #286.
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2 changed files with 12 additions and 0 deletions
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@ -19,6 +19,13 @@ class DSLTestCase(FHDLTestCase):
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self.c3 = Signal()
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self.w1 = Signal(4)
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def test_cant_inherit(self):
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with self.assertRaises(SyntaxError,
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msg="Instead of inheriting from `Module`, inherit from `Elaboratable` and "
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"return a `Module` from the `elaborate(self, platform)` method"):
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class ORGate(Module):
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pass
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def test_d_comb(self):
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m = Module()
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m.d.comb += self.c1.eq(1)
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