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hdl.ast: check type of Sample(domain=...).

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Fixes #199.
This commit is contained in:
whitequark 2019-09-08 23:55:05 +00:00
parent 3f6abc0b7a
commit 9b398b502e
2 changed files with 10 additions and 2 deletions
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7
nmigen/test/test_hdl_ast.py
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@ -629,7 +629,7 @@ class SampleTestCase(FHDLTestCase):
def test_wrong_value_operator(self):
with self.assertRaises(TypeError,
"Sampled value may only be a signal or a constant, not "
"Sampled value must be a signal or a constant, not "
"(+ (sig $signal) (const 1'd1))"):
Sample(Signal() + 1, 1, "sync")
@ -638,6 +638,11 @@ class SampleTestCase(FHDLTestCase):
"Cannot sample a value 1 cycles in the future"):
Sample(Signal(), -1, "sync")
def test_wrong_domain(self):
with self.assertRaises(TypeError,
"Domain name must be a string or None, not 0"):
Sample(Signal(), 1, 0)
class InitialTestCase(FHDLTestCase):
def test_initial(self):