hdl,back,sim: accept .as_signed() and .as_unsigned() on LHS.

These operators are ignored when they are encountered on LHS, as
the signedness of the assignment target does not matter in Amaranth.
.as_signed() appears on LHS of assigns to signed aggregate fields.

amaranth/back/rtlil.py

@@ -652,6 +652,11 @@ class _LHSValueCompiler(_ValueCompiler):
         raise TypeError # :nocov:
 
     def on_Operator(self, value):
+        if value.operator in ("u", "s"):
+            # These operators are transparent on the LHS.
+            arg, = value.operands
+            return self(arg)
+
         raise TypeError # :nocov:
 
     def match_shape(self, value, new_bits, new_sign):

amaranth/hdl/ast.py

@@ -734,6 +734,11 @@ class Operator(Value):
         raise NotImplementedError("Operator {}/{} not implemented"
                                   .format(self.operator, len(op_shapes))) # :nocov:
 
+    def _lhs_signals(self):
+        if self.operator in ("u", "s"):
+            return union(op._lhs_signals() for op in self.operands)
+        return super()._lhs_signals()
+
     def _rhs_signals(self):
         return union(op._rhs_signals() for op in self.operands)
 

amaranth/sim/_pyrtl.py

@@ -279,6 +279,8 @@ class _LHSValueCompiler(_ValueCompiler):
         return gen
 
     def on_Operator(self, value):
+        if value.operator in ("u", "s"):
+            return self(value.operands[0])
         raise TypeError # :nocov:
 
     def on_Slice(self, value):

tests/test_sim.py

@@ -62,6 +62,10 @@ class SimulatorUnitTestCase(FHDLTestCase):
         self.assertStatement(stmt, [C(0b01, signed(2)), C(0b0001, unsigned(4))], C(1))
         self.assertStatement(stmt, [C(0b11, signed(2)), C(0b0011, unsigned(4))], C(1))
 
+    def test_as_unsigned_lhs(self):
+        stmt = lambda y, a: y.as_unsigned().eq(a)
+        self.assertStatement(stmt, [C(0b01, unsigned(2))], C(0b0001, signed(4)))
+
     def test_as_signed(self):
         stmt = lambda y, a, b: y.eq(a.as_signed() == b)
         self.assertStatement(stmt, [C(0b01, unsigned(2)), C(0b0001, signed(4))], C(1))
@@ -72,6 +76,10 @@ class SimulatorUnitTestCase(FHDLTestCase):
         self.assertStatement(stmt, [C(0b01, unsigned(2))], C(0b0001, signed(4)))
         self.assertStatement(stmt, [C(0b11, unsigned(2))], C(0b1111, signed(4)))
 
+    def test_as_signed_lhs(self):
+        stmt = lambda y, a: y.as_signed().eq(a)
+        self.assertStatement(stmt, [C(0b01, unsigned(2))], C(0b0001, signed(4)))
+
     def test_any(self):
         stmt = lambda y, a: y.eq(a.any())
         self.assertStatement(stmt, [C(0b00, 2)], C(0))