Commit graph

8 commits

Author SHA1 Message Date
whitequark 1d3e9c8331 build.plat: allow (easily) overriding with an empty string on Windows. 2019-06-04 11:33:51 +00:00
whitequark 3194b5c90b build.run: extract from build.plat. 2019-06-04 07:53:34 +00:00
whitequark ed64880cc4 build.{plat,res}: add support for connectors.
Fixes #77.
2019-06-03 15:02:15 +00:00
whitequark 41adcc3f97 vendor.fpga.lattice_ice40: implement differential input buffers. 2019-06-03 08:38:12 +00:00
whitequark 6fae06aea9 build.{dsl,plat,res}: allow dir="oe".
Although a dir="oe" pin is generally equivalent to dir="io" pin with
the i* signal(s) disconnected, they are not equivalent, because some
pins may not be able to support input buffers at all, either because
there are no input buffers, or because the input buffers are consumed
by some other resource.

E.g. this can happen on iCE40 when the input buffer is consumed by
a PLL.
2019-06-03 04:42:55 +00:00
whitequark 9ba2efd86b build.{res,plat}: use xdr=0 as default, not xdr=1.
The previous behavior was semantically incorrect.
2019-06-03 03:36:32 +00:00
whitequark fb01854372 build.{res,plat}: propagate extras to pin fragment factories.
This is necessary because on some platforms, like iCE40, extras
become parameters on an IO primitive, since the constraint file
format is not expressive enough for all of them.
2019-06-03 01:58:43 +00:00
whitequark b1eab9fb3b build.plat: implement. 2019-06-01 16:43:27 +00:00