Commit graph

7 commits

Author SHA1 Message Date
whitequark fdb0c5a6bc hdl.ir: call back from Fragment.prepare if a clock domain is missing.
See #57.
2019-08-03 14:54:20 +00:00
whitequark 4887771e4a compat.sim: fix deprecated stdlib import. 2019-01-26 15:26:54 +00:00
whitequark 4948162f33 hdl.ir: rename .get_fragment() to .elaborate().
Closes #9.
2019-01-26 02:31:12 +00:00
whitequark 4922a73c5d test.compat: import tests from Migen as appropriate.
test_signed and test_coding are adjusted slightly to account for
differences in comb propagation between the simulators; we might want
to revert that eventually.
2019-01-26 01:01:03 +00:00
whitequark e230383aac back.pysim: make initial phase configurable. 2018-12-14 16:46:16 +00:00
whitequark 0ef5ced492 compat.sim: match clock period. 2018-12-14 16:39:52 +00:00
whitequark 17d26c8329 compat: add run_simulation shim. 2018-12-14 16:22:18 +00:00