whitequark 0858b8bf6c lib.cdc: specify maximum input delay in seconds. ... Since we use hertz elsewhere, this provides for easy conversions. Also, cast the delay to string before applying it in xilinx_7series, to avoid stripping the fractional digits. Closes #234.		2019-09-24 12:30:10 +00:00
..
__init__.py	vendor.fpga.lattice_ice40: implement.	2019-06-01 16:47:01 +00:00
lattice_ecp5.py	vendor.lattice_ecp5: correct a typo in tristate buffer generation	2019-09-24 11:53:38 +00:00
lattice_ice40.py	vendor.xilinx_7series: apply false path / max delay constraints.	2019-09-24 00:47:54 +00:00
xilinx_7series.py	lib.cdc: specify maximum input delay in seconds.	2019-09-24 12:30:10 +00:00
xilinx_spartan_3_6.py	vendor.xilinx_spartan_3_6: explain why ASYNC_REG is used. NFC.	2019-09-24 12:22:29 +00:00