2f9dab361f
In context of nMigen, "tools" means "parts of toolchain", so it is confusing to have a completely unrelated module also called "tools".
200 lines
6.3 KiB
Python
200 lines
6.3 KiB
Python
from .utils import *
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from ..hdl import *
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from ..hdl.rec import *
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from ..back.pysim import *
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from ..lib.io import *
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class PinLayoutCombTestCase(FHDLTestCase):
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def test_pin_layout_i(self):
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layout_1 = pin_layout(1, dir="i")
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self.assertEqual(layout_1.fields, {
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"i": ((1, False), DIR_NONE),
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})
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layout_2 = pin_layout(2, dir="i")
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self.assertEqual(layout_2.fields, {
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"i": ((2, False), DIR_NONE),
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})
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def test_pin_layout_o(self):
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layout_1 = pin_layout(1, dir="o")
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self.assertEqual(layout_1.fields, {
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"o": ((1, False), DIR_NONE),
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})
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layout_2 = pin_layout(2, dir="o")
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self.assertEqual(layout_2.fields, {
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"o": ((2, False), DIR_NONE),
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})
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def test_pin_layout_oe(self):
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layout_1 = pin_layout(1, dir="oe")
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self.assertEqual(layout_1.fields, {
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"o": ((1, False), DIR_NONE),
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"oe": ((1, False), DIR_NONE),
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})
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layout_2 = pin_layout(2, dir="oe")
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self.assertEqual(layout_2.fields, {
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"o": ((2, False), DIR_NONE),
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"oe": ((1, False), DIR_NONE),
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})
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def test_pin_layout_io(self):
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layout_1 = pin_layout(1, dir="io")
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self.assertEqual(layout_1.fields, {
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"i": ((1, False), DIR_NONE),
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"o": ((1, False), DIR_NONE),
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"oe": ((1, False), DIR_NONE),
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})
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layout_2 = pin_layout(2, dir="io")
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self.assertEqual(layout_2.fields, {
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"i": ((2, False), DIR_NONE),
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"o": ((2, False), DIR_NONE),
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"oe": ((1, False), DIR_NONE),
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})
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class PinLayoutSDRTestCase(FHDLTestCase):
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def test_pin_layout_i(self):
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layout_1 = pin_layout(1, dir="i", xdr=1)
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self.assertEqual(layout_1.fields, {
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"i_clk": ((1, False), DIR_NONE),
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"i": ((1, False), DIR_NONE),
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})
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layout_2 = pin_layout(2, dir="i", xdr=1)
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self.assertEqual(layout_2.fields, {
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"i_clk": ((1, False), DIR_NONE),
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"i": ((2, False), DIR_NONE),
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})
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def test_pin_layout_o(self):
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layout_1 = pin_layout(1, dir="o", xdr=1)
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self.assertEqual(layout_1.fields, {
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"o_clk": ((1, False), DIR_NONE),
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"o": ((1, False), DIR_NONE),
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})
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layout_2 = pin_layout(2, dir="o", xdr=1)
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self.assertEqual(layout_2.fields, {
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"o_clk": ((1, False), DIR_NONE),
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"o": ((2, False), DIR_NONE),
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})
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def test_pin_layout_oe(self):
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layout_1 = pin_layout(1, dir="oe", xdr=1)
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self.assertEqual(layout_1.fields, {
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"o_clk": ((1, False), DIR_NONE),
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"o": ((1, False), DIR_NONE),
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"oe": ((1, False), DIR_NONE),
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})
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layout_2 = pin_layout(2, dir="oe", xdr=1)
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self.assertEqual(layout_2.fields, {
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"o_clk": ((1, False), DIR_NONE),
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"o": ((2, False), DIR_NONE),
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"oe": ((1, False), DIR_NONE),
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})
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def test_pin_layout_io(self):
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layout_1 = pin_layout(1, dir="io", xdr=1)
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self.assertEqual(layout_1.fields, {
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"i_clk": ((1, False), DIR_NONE),
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"i": ((1, False), DIR_NONE),
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"o_clk": ((1, False), DIR_NONE),
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"o": ((1, False), DIR_NONE),
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"oe": ((1, False), DIR_NONE),
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})
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layout_2 = pin_layout(2, dir="io", xdr=1)
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self.assertEqual(layout_2.fields, {
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"i_clk": ((1, False), DIR_NONE),
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"i": ((2, False), DIR_NONE),
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"o_clk": ((1, False), DIR_NONE),
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"o": ((2, False), DIR_NONE),
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"oe": ((1, False), DIR_NONE),
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})
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class PinLayoutDDRTestCase(FHDLTestCase):
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def test_pin_layout_i(self):
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layout_1 = pin_layout(1, dir="i", xdr=2)
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self.assertEqual(layout_1.fields, {
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"i_clk": ((1, False), DIR_NONE),
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"i0": ((1, False), DIR_NONE),
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"i1": ((1, False), DIR_NONE),
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})
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layout_2 = pin_layout(2, dir="i", xdr=2)
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self.assertEqual(layout_2.fields, {
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"i_clk": ((1, False), DIR_NONE),
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"i0": ((2, False), DIR_NONE),
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"i1": ((2, False), DIR_NONE),
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})
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def test_pin_layout_o(self):
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layout_1 = pin_layout(1, dir="o", xdr=2)
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self.assertEqual(layout_1.fields, {
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"o_clk": ((1, False), DIR_NONE),
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"o0": ((1, False), DIR_NONE),
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"o1": ((1, False), DIR_NONE),
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})
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layout_2 = pin_layout(2, dir="o", xdr=2)
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self.assertEqual(layout_2.fields, {
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"o_clk": ((1, False), DIR_NONE),
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"o0": ((2, False), DIR_NONE),
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"o1": ((2, False), DIR_NONE),
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})
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def test_pin_layout_oe(self):
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layout_1 = pin_layout(1, dir="oe", xdr=2)
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self.assertEqual(layout_1.fields, {
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"o_clk": ((1, False), DIR_NONE),
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"o0": ((1, False), DIR_NONE),
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"o1": ((1, False), DIR_NONE),
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"oe": ((1, False), DIR_NONE),
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})
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layout_2 = pin_layout(2, dir="oe", xdr=2)
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self.assertEqual(layout_2.fields, {
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"o_clk": ((1, False), DIR_NONE),
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"o0": ((2, False), DIR_NONE),
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"o1": ((2, False), DIR_NONE),
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"oe": ((1, False), DIR_NONE),
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})
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def test_pin_layout_io(self):
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layout_1 = pin_layout(1, dir="io", xdr=2)
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self.assertEqual(layout_1.fields, {
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"i_clk": ((1, False), DIR_NONE),
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"i0": ((1, False), DIR_NONE),
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"i1": ((1, False), DIR_NONE),
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"o_clk": ((1, False), DIR_NONE),
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"o0": ((1, False), DIR_NONE),
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"o1": ((1, False), DIR_NONE),
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"oe": ((1, False), DIR_NONE),
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})
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layout_2 = pin_layout(2, dir="io", xdr=2)
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self.assertEqual(layout_2.fields, {
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"i_clk": ((1, False), DIR_NONE),
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"i0": ((2, False), DIR_NONE),
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"i1": ((2, False), DIR_NONE),
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"o_clk": ((1, False), DIR_NONE),
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"o0": ((2, False), DIR_NONE),
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"o1": ((2, False), DIR_NONE),
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"oe": ((1, False), DIR_NONE),
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})
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class PinTestCase(FHDLTestCase):
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def test_attributes(self):
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pin = Pin(2, dir="io", xdr=2)
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self.assertEqual(pin.width, 2)
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self.assertEqual(pin.dir, "io")
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self.assertEqual(pin.xdr, 2)
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