whitequark 4199674edd back.pysim: implement *.		2018-12-18 18:02:21 +00:00
..
back	back.pysim: implement *.	2018-12-18 18:02:21 +00:00
compat	hdl.dsl: add clock domain support.	2018-12-16 23:51:24 +00:00
hdl	hdl.ast, hdl.xfrm: various microoptimizations to speed up pysim.	2018-12-18 16:13:29 +00:00
lib	Rename fhdl→hdl, genlib→lib.	2018-12-15 14:25:31 +00:00
test	back.pysim: implement *.	2018-12-18 18:02:21 +00:00
__init__.py	test.sim: add tests for sync functionality and errors.	2018-12-18 17:53:50 +00:00
tools.py	hdl.ast: implement Array and ArrayProxy.	2018-12-15 17:16:31 +00:00
tracer.py	tracer: add support for Python 3.7.	2018-12-13 02:20:00 +00:00