whitequark 65da905c15 vendor.xilinx_spartan_3_6: always use -w for map/par/bitgen. ... -w stands for "override output file", and supplying user options should not remove it.		2019-08-04 14:12:02 +00:00
..
__init__.py	vendor.fpga.lattice_ice40: implement.	2019-06-01 16:47:01 +00:00
lattice_ecp5.py	build.plat,vendor: automatically create sync domain from default_clk.	2019-08-03 18:36:58 +00:00
lattice_ice40.py	vendor.lattice_ice40: avoid routing conflicts with SDR/DDR input pins.	2019-08-04 00:30:50 +00:00
xilinx_7series.py	build.plat,vendor: automatically create sync domain from default_clk.	2019-08-03 18:36:58 +00:00
xilinx_spartan_3_6.py	vendor.xilinx_spartan_3_6: always use -w for map/par/bitgen.	2019-08-04 14:12:02 +00:00