amaranth/nmigen/vendor
2019-06-12 22:28:45 +00:00
..
__init__.py vendor.fpga.lattice_ice40: implement. 2019-06-01 16:47:01 +00:00
lattice_ice40.py Simplify code by using Signal.like(name_suffix="..") appropriately. 2019-06-12 22:28:45 +00:00
xilinx_7series.py vendor.xilinx_7series: implement DDR I/O buffers. 2019-06-12 19:55:10 +00:00
xilinx_spartan6.py build.{dsl,res,plat}: add PinsN and DiffPairsN. 2019-06-12 14:42:39 +00:00