Adam Greig 6ce2b21e19 vendor.lattice_ecp5: replicate OE signal for each output bit. ... nextpnr can only pack OE FFs into IOLOGIC when there's one OFS1P3DX per output, rather than one shared instance.		2021-01-23 18:06:52 +00:00
..
__init__.py	vendor.fpga.lattice_ice40: implement.	2019-06-01 16:47:01 +00:00
intel.py	vendor.intel: implement add_settings (QSF) and add_constraints (SDC) overrides.	2020-11-24 20:35:58 +00:00
lattice_ecp5.py	vendor.lattice_ecp5: replicate OE signal for each output bit.	2021-01-23 18:06:52 +00:00
lattice_ice40.py	build.plat: TemplatedPlatform.iter_extra_files→Platform.iter_files.	2020-11-10 05:30:30 +00:00
lattice_machxo2.py	sim: split into base, core, and engines.	2020-08-27 11:52:31 +00:00
lattice_machxo_2_3l.py	build.plat: TemplatedPlatform.iter_extra_files→Platform.iter_files.	2020-11-10 05:30:30 +00:00
quicklogic.py	vendor.quicklogic: enable SoC clock configuration	2020-11-13 16:27:15 +00:00
xilinx_7series.py	Revert "vendor.xilinx_7series: byte swap generated bitstream"	2020-12-12 22:08:57 +00:00
xilinx_spartan_3_6.py	vendor.xilinx_spartan_3_6: fix typo.	2020-11-22 00:16:02 +00:00
xilinx_ultrascale.py	build.plat: TemplatedPlatform.iter_extra_files→Platform.iter_files.	2020-11-10 05:30:30 +00:00