whitequark 70bbfecf6d vendor.lattice_ice40: never place an inverter on global buffer output. ... This would make `pin.i` not a global network anymore, which is likely undesirable if an explicit Attrs(GLOBAL=1) is specified.		2019-06-14 20:44:02 +00:00
..
__init__.py	vendor.fpga.lattice_ice40: implement.	2019-06-01 16:47:01 +00:00
lattice_ice40.py	vendor.lattice_ice40: never place an inverter on global buffer output.	2019-06-14 20:44:02 +00:00
xilinx_7series.py	vendor.xilinx_7series: implement inverters.	2019-06-13 15:14:09 +00:00
xilinx_spartan6.py	vendor.xilinx_spartan6: implement DDR I/O buffers and inverters.	2019-06-13 15:13:31 +00:00