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whitequark 8b34602d91 vendor.xilinx_{7series,spartan6}: connect FCDE and IOB directly. 
Before this commit, in some cases there will be an inverter, which is
not allowed on an FDCE with IOB attribute set to true, as it will
interfere with packing.
2019-06-17 15:47:56 +00:00
..
__init__.py vendor.fpga.lattice_ice40: implement. 2019-06-01 16:47:01 +00:00
lattice_ice40.py vendor.lattice_ice40: never place an inverter on global buffer output. 2019-06-14 20:44:02 +00:00
xilinx_7series.py vendor.xilinx_{7series,spartan6}: connect FCDE and IOB directly. 2019-06-17 15:47:56 +00:00
xilinx_spartan6.py vendor.xilinx_{7series,spartan6}: connect FCDE and IOB directly. 2019-06-17 15:47:56 +00:00