whitequark 378e924280 hdl.ast: rename nbits to width. ... Also, replace `bits, sign = x.shape()` with more idiomatic `width, signed = x.shape()`. This unifies all properties corresponding to `len(x)` to `x.width`. (Not all values have a `width` property.) Fixes #210.		2019-09-20 15:36:25 +00:00
..
__init__.py	hdl.xfrm: CEInserter→EnableInserter.	2019-08-12 13:39:26 +00:00
ast.py	hdl.ast: rename nbits to width.	2019-09-20 15:36:25 +00:00
cd.py	hdl.cd: add negedge clock domains.	2019-08-31 22:05:48 +00:00
dsl.py	hdl.ast: rename nbits to width.	2019-09-20 15:36:25 +00:00
ir.py	build.plat, hdl.ir: coordinate missing domain creation.	2019-08-19 22:52:01 +00:00
mem.py	hdl.ast: rename nbits to width.	2019-09-20 15:36:25 +00:00
rec.py	hdl.rec: respect modifications to signals in Record.like().	2019-07-08 10:59:15 +00:00
xfrm.py	hdl.ast: rename nbits to width.	2019-09-20 15:36:25 +00:00