amaranth/nmigen
whitequark d22b2c5604 build.plat: avoid type confusion in _check_feature.
Before this commit, `_check_feature(valid_xdrs=0)` would mean that
XDR buffers are not supported. Only `_check_feature(valid_xdrs=())`
was intended to be an indicator of that.
2020-10-15 08:56:09 +00:00
..
_toolchain _toolchain.cxx: work around PyPy missing LDCXXSHARED sysconfig variable. 2020-08-27 06:53:14 +00:00
back back.verilog: use proc -nomux if it is available. 2020-08-27 13:03:15 +00:00
build build.plat: avoid type confusion in _check_feature. 2020-10-15 08:56:09 +00:00
compat sim: split into base, core, and engines. 2020-08-27 11:52:31 +00:00
hdl hdl.mem: document ReadPort and WritePort. 2020-09-17 15:47:46 +00:00
lib lib.cdc: in AsyncFFSynchronizer(), rename domain= to o_domain=. 2020-08-26 03:19:13 +00:00
sim sim: split into base, core, and engines. 2020-08-27 11:52:31 +00:00
test nmigen.test.utils: restore FHDLTestCase to gracefully deprecate it. 2020-08-27 00:46:50 +00:00
vendor vendor.lattice_{ecp5,machxo_2_3l}: explain how to set up NMIGEN_ENV_Diamond on Windows. 2020-08-29 19:34:57 +00:00
__init__.py Gracefully handle missing dependencies. 2020-07-01 07:00:02 +00:00
_unused.py _unused: extract must-use logic from hdl.ir. 2020-02-01 01:35:05 +00:00
_utils.py hdl.ir: allow disabling UnusedElaboratable warning in file scope. 2019-10-26 06:17:14 +00:00
asserts.py hdl.ast,back.rtlil: implement Cover. 2019-09-03 01:32:24 +00:00
cli.py cli: Improve help texts 2020-08-22 14:41:37 +00:00
rpc.py rpc: add public Records as module ports. 2019-09-30 18:28:21 +00:00
tracer.py tracer: fix get_var_name() to work on toplevel attributes. 2020-05-17 19:51:58 +00:00
utils.py {,_}tools→{,_}utils 2019-10-13 18:53:38 +00:00