whitequark eb04a2509e hdl.mem,lib,examples: use Signal.range().		2019-09-08 12:19:13 +00:00
..
alu.py	examples: reorganize into examples/basic and examples/board.	2019-06-03 16:17:37 +00:00
alu_hier.py	examples: reorganize into examples/basic and examples/board.	2019-06-03 16:17:37 +00:00
arst.py	test: generate examples to verilog as part of unit tests.	2019-07-08 10:12:26 +00:00
cdc.py	Remove nmigen.lib from prelude.	2019-09-06 06:53:06 +00:00
ctr.py	examples: reorganize into examples/basic and examples/board.	2019-06-03 16:17:37 +00:00
ctr_en.py	hdl.xfrm: CEInserter→EnableInserter.	2019-08-12 13:39:26 +00:00
fsm.py	hdl.mem,lib,examples: use Signal.range().	2019-09-08 12:19:13 +00:00
gpio.py	examples: reorganize into examples/basic and examples/board.	2019-06-03 16:17:37 +00:00
inst.py	examples: reorganize into examples/basic and examples/board.	2019-06-03 16:17:37 +00:00
mem.py	examples: reorganize into examples/basic and examples/board.	2019-06-03 16:17:37 +00:00
pmux.py	examples: reorganize into examples/basic and examples/board.	2019-06-03 16:17:37 +00:00
por.py	hdl.mem,lib,examples: use Signal.range().	2019-09-08 12:19:13 +00:00
uart.py	hdl.mem,lib,examples: use Signal.range().	2019-09-08 12:19:13 +00:00