whitequark ec8386a797 back.pysim: fix emission of undriven traces to VCD files. ... This has been originally implemented in commit d3775eed (which fixed `write_vcd(traces=)` to do something at all), but had a flaw where undriven traces would not be correctly placed in hierarchy. This used to produce incorrect results on pyvcd 0.1, but started causing assertion failures on pyvcd 0.2. Fixes #345.		2020-04-03 05:20:42 +00:00
..
__init__.py	Initial commit.	2018-12-12 03:18:44 +00:00
pysim.py	back.pysim: fix emission of undriven traces to VCD files.	2020-04-03 05:20:42 +00:00
rtlil.py	hdl.ast: add Value.{as_signed,as_unsigned}.	2020-02-06 18:27:55 +00:00
verilog.py	back.verilog: remove $verilog_initial_trigger after proc_prune.	2019-10-28 10:11:41 +00:00