whitequark 0899ff366b compat.fhdl.bitcontainer: fix value_bits_sign(). ... This function was broken in commit 659b0e81; some downstream code expects bits_sign to be e.g. indexable.		2020-07-21 02:53:29 +00:00
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__init__.py	compat.fhdl.bitcontainer: import/wrap Migen code.	2018-12-12 15:22:34 +00:00
bitcontainer.py	compat.fhdl.bitcontainer: fix value_bits_sign().	2020-07-21 02:53:29 +00:00
conv_output.py	compat: provide verilog.convert shim.	2018-12-21 13:53:06 +00:00
decorators.py	{,_}tools→{,_}utils	2019-10-13 18:53:38 +00:00
module.py	_unused: extract must-use logic from hdl.ir.	2020-02-01 01:35:05 +00:00
specials.py	compat.fhdl.specials: fix handling of tristate (i=None) pins.	2020-07-02 22:22:44 +00:00
structure.py	Remove everything deprecated in nmigen 0.1.	2020-01-12 13:59:26 +00:00
verilog.py	Add support for using non-compat Elaboratable instances with compat.fhdl.verilog.convert and compat.run_simulation	2020-04-02 02:46:44 +00:00